Low-Power Techniques for Digital and Mixed-Signal Systems

GREEN lab explores an integrated approach to power reduction in digital and mixed-signal systems. The innovative circuit techniques are coupled with emerging technologies and µ-architecture/system principles to reduce energy dissipation. We believe energy inefficiencies in a complex mixed signal system originate from the built-in safety margin of each component and inherent imbalance in the energy profile of different components. Traditionally, each component is designed to provide minimum error rate even under worst-case environments. We hypothesize that circuit/architecture of ultra-low-power digital and analog components coupled with on-line real-time control to optimally balance the energy dissipation across components to maintain the system level QoS is the key to energy-efficiency across all environments.

Ultra-Low-Power Analog Circuits with Steep Subthreshold Devices: Understanding the interactions between analog circuits and emerging technologies is an interesting problem. We are exploring application of steep subthreshold devices like Tunnel FETs  for analog circuit blocks like Operational Transconductance Amplifier (OTA). The understanding of OTAs are driving the study of Tunnel FET based Cellular Neural Network (CNN) circuits. An unconventional mixed-signal image processing platform based on Tunnel FET will have tremendous consequences for future mixed-signal computing platforms.

Zero-Margin Adaptive Digital Circuits: The timing/voltage safety margins required to maintain error-free operation under static and dynamic noise in digital system at the expense of reduced energy-efficiency during nominal operation. We are developing logic and memory (SRAM) circuits that pushes the supply voltage limit during nominal operating conditions while adapts the functionality under time-varying noise. Modeling of failure rates, design of circuit techniques, and their experimental verification is the focus of our work to design a truly adaptive “zero margin”  digital systems.

Approximate Accuracy-Aware µ-Architecture: The error-energy trade-off at the architecture and system level is an intriguing approach to reduce energy dissipation while maintaining application quality. We are exploring algorithmic policies and associated circuit techniques to design a mobile processor that can perform accuracy-energy trade-off for multimedia applications while preserving the quality-of-service requirements.

Reconfigurable System with Volatile/Non-volatile Memory: We are investigating a novel computing platform, namely, memory based computing (MBC) for energy-efficient reconfigurable systems. MBC can dramatically change the energy behavior of reconfigurable logic.  We are designing memory array using silicon CMOS (Static RAM) and non-volatile devices (Spin-Torque-Transfer RAM). We couple the properties of the reconfigurable systems and characteristics of SRAM/STTRAM cells to develop and experimentally demonstrate ultra-low-power MBC platform.

Cross-Layer Energy Management in Wireless Systems:  We are exploring a cross-layer adaptation and control (CAC) techniques for image/multimedia sensor nodes that can simultaneously control the back-end signal/image processing algorithms, digital hardware, and RF-front end to maintain the end-to-end quality-of-service of sensor network while minimizing the energy dissipation at the sensor nodes.