Publications in 2019

Journal Articles

  1. S. MukhopadhyayY. LongB. Mudassar, C. Nair,B. H. Deprospo, H. M. Torun, M. Kathaperumal, V. Smet, D. Kim, S. Yalamanchili, and M. Swaminathan, “Heterogenous Integration for Artificial Intelligence: Challenges and Opportunities,” IBM Journal of Research and Development (IBM J. R&D), vol. 63 , no. 6 , Nov.-Dec. 2019, pp. 4.1-4.23.
  2. M. Lee, A. Singh, H. M. Torun, J. Kim, S. K. Lim, M. Swaminathan, and S. Mukhopadhyay, “Automated I/O Library Generation for Interposer-based System-in-Package Integration of Multiple Heterogeneous Dies,” IEEE Transactions on Component, Packaging, and Manufacturing Technology (TCPMT), vol 10, no. 1, Nov. 2019, pp. 111-122.
  3. B. Mudassar, P. Saha, Y. Long, M. F. Amir, E. Gebhardt, T. Na, J. H. Ko, M. Wolf, and S. Mukhopadhyay, “CAMEL: An Adaptive Camera with Embedded Machine Learning Based Sensor Parameter Control,” IEEE Journal of Emerging Technologies in Circuits and Systems (JETCAS), vo. 9 , no. 3, Sept. 2019, pp. 498-508.
  4. V. Chekuri, M. Kar, A. Singh, and S. Mukhopadhyay, “Auto-tuning of Integrated Inductive Voltage Regulator using On-chip Delay Sensor to Tolerate Process and Passive Variations,” IEEE Transactions on VLSI Systems (TVLSI), vol. 27, no. 8, Aug. 2019, pp. 1768 – 1778.
  5. P. Bose and S. Mukhopadhyay, “Energy-Secure System Architectures (ESSA): A Workshop Report,” IEEE Micro, vol. 39, no. 4, July-Aug. 1 2019, pp. 27-34
  6. A. Singh, M. Kar, S. Matthew, A. Rajan, V. De, and S. Mukhopadhyay, “Improved Power/EM Side Channel Attack Resistance of 128-bit AES Engines with Random Fast Voltage Dithering,” IEEE Journal of Solid State Circuits (JSSC), vol. 54, no. 2, Feb. 2019, pp. 569 – 583.
  7. A. Singh, N. ChawlaJ. H. Ko, M. Kar, and S. Mukhopadhyay,“Energy Efficient and Side-Channel Secure Cryptographic Hardware for IoT-edge Nodes,” IEEE Internet-of-Things Journal (IOT-J), vol 6, no. 1, Feb. 2019, pp. 421-434.
  8. N. Kumar, J. Chen, M. Kar, S. K. Sitaraman, S. Mukhopadhyay, and S. Kumar, “Multi-gated Carbon Nanotube Field Effect Transistors based Physically Unclonable Functions as Security Key,” IEEE Internet-of-Things Journal (IOT-J), vol 6, no. 1, Feb. 2019, pp. 325-334.
  9. J. H. Ko, D. Kim, T. Na, and S. Mukhopadhyay, “Design and Analysis of a Neural Network Inference Engine based on Adaptive Weight Compression,” IEEE Transactions on Computer Aided Design (TCAD), vol. 38 , no. 1, Jan. 2019, pp. 109 – 121.

Conference Papers (Peer Reviewed)

  1. H. M. Torun, H. Yu, Dasari, V. Chekuri, A. Singh, J. Kim, S. K. Lim, S. Mukhopadhyay, and M. Swaminathan, “A Spectral Convolutional Net for Co-Optimization of Integrated Voltage Regulators and Embedded Inductors,” International Conference on Computer Aided Design (ICCAD), November 2019.
  2. E. Lee, D. Kim,V. Chekuri, Y. Long, and S. Mukhopadhyay, “A ReRAM Memory Compiler with Layout-Precise Performance Evaluation,” IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), October 2018
  3. M. Lee, B. A. Mudassar, T. Na, and S. Mukhopadhyay, “A Spatiotemporal Pre-processing Network for Activity Recognition under Rain,” British Machine Vision Conference(BMVC), Sept. 2019
  4. B. A. Mudassar and S. Mukhopadhyay, “Rethinking Convolutional Feature Extraction for Small Object Detection,” British Machine Vision Conference(BMVC), Sept. 2019
  5. V. Chekuri, N. Dasari, A. Singh,and S. Mukhopadhyay, “Automatic GDSII Generator for On-Chip Voltage Regulator for Easy Integration in Digital SoCs,” IEEE International Symposium on Low-power Electronics and Design(ISLPED), July 2019.
  6. T. Na, M. Lee, B. A. Mudassar, P. Saha, J. H. Ko,and S. Mukhopadhyay, “Mixture of Pre-processing Experts Model for Noise Robust Deep Learning on Resource Constrained Platforms,” IEEE International Joint Conference on Neural Network (IJCNN), July 2019.
  7. B. A. MudassarandS. Mukhopadhyay, “FocalNet – Foveal Attention for Post-processing DNN Outputs,” IEEE International Joint Conference on Neural Network (IJCNN), July 2019.
  8. N. Chawla, A. Singh, M. Kar,and S. Mukhopadhyay, “Application Inference using Machine Learning based Side Channel Analysis,” IEEE International Joint Conference on Neural Network (IJCNN), 2019.
  9. X. She, Y. Long, and S. Mukhopadhyay, “Improving Robustness of ReRAM-based Spiking Neural Network Accelerator with Stochastic Spike-timing-dependent-plasticity,” IEEE International Joint Conference on Neural Network (IJCNN), July 2019.
  10. H. Park, K. Chang, B. W. Ku, J. Kim, E. Lee, D. Kim, A. Chaudhuri, S. Banerjee, S. Mukhopadhyay, K. Chakrabarty, and S. K. Lim, “RTL-to-GDS Tool Flow and Design-for-Test Solutions for Monolithic 3D ICs,” Design Automation Conference (DAC), June 2019.
  11. J. Kim, G. Murali, H. Park, E. Qin, H. Kwon, V. Chekuri, N. Dasari, A. Singh, M. Lee, H. M. Torun, K. Roy, M. Swaminathan, S. Mukhopadhyay, T. Krishna, and S. Kyu Lim, “Architecture, Chip, and Package Co-design Flow for 2.5D Integration of Reusable IP Chiplets”, Design Automation Conference (DAC), June 2019.
  12. V. Chekuri, A. Singh, N. Dasari, and S. Mukhopadhyay, “On the Effect of NBTI Induced Aging of Power Stage on the Transient Performance of On-Chip Voltage Regulators,” International Reliability Physics Symposium(IRPS), April 2019.
  13. N. Chawla, N. M. Rahman, A. Singh, M. Kar, and S. Mukhopadhyay, “Extracting side-channel leakage from round unrolled implementations of lightweight ciphers,” IEEE International Symposium on Hardware Oriented Security and Trust(HOST), May 2019.
  14. M. Lee, A. Singh, H. Torun, J. Kim, S Lim, M. Swaminathan, and S. Mukhopadhyay. “ Automated Generation of All-Digital I/O Library Cells for Multiple Dies in System-in-Package Integration,” GOMACTECH, March 2019.
  15. H. M. Torun, N. Dasari, A. Singh, M. Lee,J. Kim, H. Park, H. Kwon, E. Qin, T. Krishna, S. K. Lim, S. Mukhopadhyay and M. Swaminathan, “Design Space Exploration of Power Delivery in Heterogeneous Integration,” GOMACTECH, March 2019.
  16. Y. Long, X. She, and S. Mukhopadhyay, “Design of Reliable DNN Accelerator with Un-reliable ReRAM,” Design Automation and Test in Europe(DATE), March 2019.
  17. X. She, Y. Long, and S. Mukhopadhyay, “Fast and Low-Precision Learning in GPU-Accelerated Spiking Neural Network,” Design Automation and Test in Europe(DATE), March 2019.
  18. A. Singh, M. Kar, N. Chawla, and S. Mukhopadhyay, “Mitigating Power Supply Glitch based Fault Attacks with Fast All-Digital Clock Modulation Circuit,” Design Automation and Test in Europe(DATE), March 2019.
  19. (Invited) A. Mudassar, P. Saha, Y. Long, M. F. Amir, E. Gebhardt, T. Na, J. H. Ko, M. Wolf and S. Mukhopadhyay, “A Camera With Brain – Embedding Machine Learning In 3d Image Sensor,” Design Automation and Test in Europe(DATE), March 2019.
  20. A. Singh, M. Kar, S. Matthew, A. Rajan, V. De, and S. Mukhopadhyay, “A 128b AES Engine with Higher Resistance to Power and Electromagnetic Side-Channel Attacks Enabled by a Security-Aware Integrated All-Digital Low-Dropout Regulator,” IEEE International Solid State Circuit Conference (ISSCC), Feb 2019.