The physical security is a key challenge for the resource-constrained edge platforms. A key challenge is to enable secure as well as ultra-low-power hardware. Our research seeks to understand the interactions between low-power and security in edge devices, and explore innovations to enhance security at minimal power cost. The specific research vectors in this domain are:
- Enhancing Resistance to Side-channel Attack: The side-channel is an well-known attack model where an adversary measures physical signatures (power, timing, electromagnetic emission etc.) of a logic engine to understand/jeopardize its functionality. A major challenge application of side-channel analysis is to extract secret key of strong encryption engines. We are exploring circuit innovations to enhance resistance security against power and electromagnetic emission based side- channel attacks. The key approach is to incorporate security-aware circuits in the power and clock distribution networks to enhance side-channel resistance. Our research to date has demonstrated the application of different types of integrated voltage regulators and adaptive clocking modules to achieve this goal.
- Low-power and Side-channel Resistant Crypto Engines: We are investigating the interactions between design of area-/power- efficient crypto engines and their side- channel resistance. The goal is to enable side-channel secure encryption in resource-constrained platforms such as sensors.